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| 74ACT16244 16-Bit Buffer/Line Driver with 3-STATE Outputs August 1999 Revised October 1999 74ACT16244 16-Bit Buffer/Line Driver with 3-STATE Outputs General Description The ACT16244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. Features s Separate control logic for each byte and nibble s 16-bit version of the ACT244 s Outputs source/sink 24 mA s TTL-compatible inputs Ordering Code: Order Number 74ACT16244SSC 74ACT16244MTD Package Number MS48A MTD48 Package Description 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Logic Symbol Connection Diagram Pin Description Pin Names OEn I0-I15 O0-O15 Description Output Enable Input (Active LOW) Inputs Outputs FACTTM is a trademark of Fairchild Semiconductor Corporation. (c) 1999 Fairchild Semiconductor Corporation DS500295 www.fairchildsemi.com 74ACT16244 Functional Description The ACT16244 contains sixteen non-inverting buffers with 3-STATE standard outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. Truth Tables Inputs OE1 L L H I0-I3 L H X Outputs O0-O3 L H Z OE2 L L H Inputs I4-I7 L H X Outputs O4-O7 L H Z Inputs OE3 L L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Outputs I8-I11 L H X O8-O11 L H Z OE4 L L H Inputs I12-I15 L H X Outputs O12-O15 L H Z Logic Diagram www.fairchildsemi.com 2 74ACT16244 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI = - 0.5V VI = VCC + 0.5V DC Output Diode Current (IOK) VO = -0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source/Sink Current (IO) DC VCC or Ground Current per Output Pin Junction Temperature Storage Temperature 50 mA +140C -65C to +150C -20 mA +20 mA -0.5V to VCC + 0.5V 50 mA -20 mA +20 mA -0.5V to +7.0V Recommended Operating Conditions Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (V/t) VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACTTM circuits outside databook specifications. 4.5V to 5.5V 0V to VCC 0V to VCC -40C to +85C 125 mV/ns DC Electrical Characteristics Symbol VIH VIL VOH Parameter Minimum HIGH Input Voltage Maximum LOW Input Voltage Minimum HIGH Output Voltage VCC (V) 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum LOW Output Voltage 4.5 5.5 4.5 5.5 IOZ IIN ICCT ICC IOLD IOHD Maximum 3-STATE Leakage Current Maximum Input Leakage Current Maximum ICC/Input Max Quiescent Supply Current Minimum Dynamic Output Current (Note 3) 5.5 5.5 5.5 5.5 5.5 0.6 8.0 0.001 0.001 TA = +25C Typ 1.5 1.5 1.5 1.5 4.49 5.49 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.5 0.1 TA = -40C to +85C Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 5.0 1.0 1.5 80.0 75 -75 A A mA A mA mA V V V V VOUT = 0.1V or VCC - 0.1V VOUT = 0.1V or VCC - 0.1V IOUT = -50 A VIN = VIL or VIH V IOH = -24 mA IOH = -24 mA (Note 2) IOUT = 50 A VIN = VIL or VIH V IOH = 24 mA IOH = 24 mA (Note 2) VI = VIL, VIH VO = VCC, GND VI = VCC, GND VI = VCC -2.1V VIN = VCC or GND VOLD = 1.65V Max VOHD = 3.85V Min Units Conditions Note 2: All outputs loaded; thresholds associated with output under test. Note 3: Maximum test duration 2.0 ms; one output loaded at a time. 3 www.fairchildsemi.com 74ACT16244 AC Electrical Characteristics VCC Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay An, Bn to Bn, An Output Enable Time Output Disable Time Parameter (V) (Note 4) 5.0 5.0 5.0 Min 3.0 2.5 2.5 2.7 2.3 2.0 TA = +25C CL = 50 pF Typ 5.2 4.8 5.0 4.6 5.0 4.6 Max 7.3 6.8 7.4 7.5 7.9 7.4 TA = -40C to +85C CL = 50 pF Min 3.0 2.5 2.5 2.7 2.3 2.0 Max 7.8 7.3 7.9 8.0 8.2 7.9 ns ns ns Units Note 4: Voltage Range 5.0 is 5.0V 0.5V. Capacitance Symbol CIN CPD Input Pin Capacitance Power Dissipation Capacitance Parameter Typ 4.5 30 Units pF pF VCC = 5.0V VCC = 5.0V Conditions www.fairchildsemi.com 4 74ACT16244 Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 5 www.fairchildsemi.com 74ACT16244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 www.fairchildsemi.com 6 74ACT16244 16-Bit Buffer/Line Driver with 3-STATE Outputs Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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